312 research outputs found

    Characterization of an embedded RF-MEMS switch

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    An RF-MEMS capacitive switch for mm-wave integrated circuits, embedded in the BEOL of 0.25μm BiCMOS process, has been characterized. First, a mechanical model based on Finite-Element-Method (FEM) was developed by taking the residual stress of the thin film membrane into account. The pull-in voltage and the capacitance values obtained with the mechanical model agree very well with the measured values. Moreover, S-parameters were extracted using Electromagnetic (EM) solver. The data observed in this way also agree well with the experimental ones measured up to 110GHz. The developed RF model was applied to a transmit/receive (T/R) antenna switch design. The results proved the feasibility of using the FEM model in circuit simulations for the development of RF-MEMS switch embedded, single-chip multi-band RF ICs

    A monolithically integrated silicon modulator with a 10 Gb/s 5 V pp or 5.6 V pp driver in 0.25 μm SiGe:C BiCMOS

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    This paper presents as a novelty a fully monolithically integrated 10 Gb/s silicon modulator consisting of an electrical driver plus optical phase modulator in 0.25 μm SiGe:C BiCMOS technology on one chip, where instead of a SOI CMOS process (only MOS transistors) a SiGe BiCMOS process (MOS transistors and fast SiGe bipolar transistors) is implemented. The fastest bipolar transistors in the BiCMOS product line used have a transit frequency of f t ≈ 120 GHz and a collector-emitter breakdown voltage of BV CE0 = 2.2 V (IHP SG25H3). The main focus of this paper will be given to the electronic drivers, where two driver variants are implemented in the test chips. Circuit descriptions and simulations, which treat the influences of noise and bond wires, are presented. Measurements at separate test chips for the drivers show that the integrated driver variant one has a low power consumption in the range of 0.66 to 0.68 W but a high gain of S 21 = 37 dB. From the large signal point of view this driver delivers an inverted as well as a non-inverted output data signal between 0 and 2.5 V (5 V pp differential). Driver variant one is supplied with 2.5 V and with 3.5 V. Bit-error-ratio (BER) measurements resulted in a BER better than 10 −12 for voltage differences of the input data stream down to 50 mV pp . Driver variant two, which is an adapted version of driver variant one, is supplied with 2.5 and 4.2 V, consumes 0.83 to 0.87 W, delivers a differential data signal with 5.6 V pp at the output and has a gain of S 21 = 40 dB. The chip of the fully integrated modulator occupies an area of 12.3 mm 2 due to the photonic components. Measurements with a 240 mV pp electrical input data stream, 1.25 V input common-mode voltage and for an optical input wavelength of 1540 nm resulted in an extinction ratio of 3.3 dB for 1 mm long RF phase shifters in each modulator arm driven by driver variant one and a DC tuning voltage of 1.2 V. The extinction ratio was 8.4 dB at a DC tuning voltage of 7 V for a device with 2 mm long RF phase shifters in each arm and driver variant two

    Lateral Selective SiGe Growth for Local Dislocation-Free SiGe-on-Insulator Virtual Substrate Fabrication

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    Dislocation free local SiGe-on-insulator (SGOI) virtual substrate is fabricated using lateral selective SiGe growth by reduced pressure chemical vapor deposition. The lateral selective SiGe growth is performed around a ∼1.25 μm square Si (001) pillar in a cavity formed by HCl vapor phase etching of Si at 850 °C from side of SiO2/Si mesa structure on buried oxide. Smooth root mean square roughness of SiGe surface of 0.14 nm, which is determined by interface roughness between the sacrificially etched Si and the SiO2 cap, is obtained. Uniform Ge content of ∼40% in the laterally grown SiGe is observed. In the Si pillar, tensile strain of ∼0.65% is found which could be due to thermal expansion difference between SiO2 and Si. In the SiGe, tensile strain of ∼1.4% along 〈010〉 direction, which is higher compared to that along 〈110〉 direction, is observed. The tensile strain is induced from both [110] and [−110] directions. Threading dislocations in the SiGe are located only ∼400 nm from Si pillar and stacking faults are running towards 〈110〉 directions, resulting in the formation of a wide dislocation-free area in SiGe along 〈010〉 due to horizontal aspect ratio trapping

    Fabrication of low-loss SOI nano-waveguides including BEOL processes for nonlinear applications

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    We report successful fabrication of low-loss SOI nano-waveguides with integrated PIN diode structures. The entire fabrication process is done on a 200 mm BiCMOS toolset using front-end-of-line (FEOL) and back-end-of-line (BEOL) processes and does not show any undesirable influence upon the photonic performance. Such a waveguide technology forms an attractive platform for a wide range of nonlinear applications due to efficient free carrier removal as well as use of standard substrates and processing technology. Nonlinear experiments were conducted to investigate the potential of the introduced technology. The performance of the designed waveguides can be used as a benchmark for future development of proposed platform for integrated silicon photonics and electronics circuits

    ESSenTIAL : EPIXfab services specifically targeting (SME) industrial takeup of advanced silicon photonics

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    ePIXfab brings silicon photonics within reach of European small and medium sized enterprises, thereby building on its track record and its integration into Europractice. To this end, ePIXfab offers affordable access to standardized active and passive silicon photonic IC and packaging technology, a path from design to manufacturing and hands-on training. Based on a consortium of major research institutes with silicon photonics expertise, ePIXfab reaches out to European industry and supports them to evaluate silicon photonics in the context of concrete applications and markets. In order to ensure low-cost, quick access and scalability to manufacturing, the maturity of silicon photonic IC technology is enhanced by setting up a library of generic devices, a level of process and device benchmarking and a well maintained design flow. For the first time, devices in a standard package are offered to facilitate measurements. Training programs on the IC and packaging services are also offered, including hands-on training in making designs. Maturity, standardization and sustainability are driven by a steadily growing worldwide user base

    Neutrophil swarming and extracellular trap formation play a significant role in Alum adjuvant activity

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    There are over 6 billion vaccine doses administered each year, most containing aluminium-based adjuvants, yet we still do not have a complete understanding of their mechanisms of action. Recent evidence has identified host DNA and downstream sensing as playing a significant role in aluminium adjuvant (aluminium hydroxide) activity. However, the cellular source of this DNA, how it is sensed by the immune system and the consequences of this for vaccination remains unclear. Here we show that the very early injection site reaction is characterised by inflammatory chemokine production and neutrophil recruitment. Intravital imaging demonstrates that the Alum injection site is a focus of neutrophil swarms and extracellular DNA strands. These strands were confirmed as neutrophil extracellular traps due to their sensitivity to DNAse and absence in mice deficient in peptidylarginine deiminase 4. Further studies in PAD4−/− mice confirmed a significant role for neutrophil extracellular trap formation in the adjuvant activity of Alum. By revealing neutrophils recruited to the site of Alum injection as a source of the DNA that is detected by the immune system this study provides the missing link between Alum injection and the activation of DNA sensors that enhance adjuvant activity, elucidating a key mechanism of action for this important vaccine component
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